In general, when multiple high breakdown-voltage transistors are arranged on a semiconductor substrate, the high breakdown-voltage transistors are isolated from each other with an element isolation insulating film (shallow trench isolation: STI). For the purpose of securing a breakdown voltage for the high breakdown-voltage transistors, a well is not formed around the high breakdown-voltage transistors. However, this causes depletion layers of two adjacent high breakdown-voltage transistors to come into contact with each other when a high voltage is applied to the gate electrodes of the high breakdown-voltage transistors. That is, punch-through may occur. This may cause a leakage current to flow between the adjacent high breakdown-voltage transistors.
As a countermeasure against this, a technology of forming an impurity diffusion region directly below a STI has been proposed. However, a method of forming the impurity diffusion region directly below the STI has a problem of deteriorating device characteristics with shrinking semiconductor devices.